v3 adjustments, sensor test project

board/PlantCtrlESP32.kicad_prl

@@ -68,7 +68,7 @@
       39,
       40
     ],
-    "visible_layers": "ffdfffe_ffffffff",
+    "visible_layers": "ffcc02f_ffffffff",
     "zone_display_mode": 1
   },
   "git": {

board/PlantCtrlESP32.kicad_pro

@@ -1102,11 +1102,131 @@
           "label": "DNP",
           "name": "${DNP}",
           "show": true
+        },
+        {
+          "group_by": false,
+          "label": "#",
+          "name": "${ITEM_NUMBER}",
+          "show": false
+        },
+        {
+          "group_by": false,
+          "label": "Availability",
+          "name": "Availability",
+          "show": false
+        },
+        {
+          "group_by": false,
+          "label": "Check_prices",
+          "name": "Check_prices",
+          "show": false
+        },
+        {
+          "group_by": false,
+          "label": "Description_1",
+          "name": "Description_1",
+          "show": false
+        },
+        {
+          "group_by": false,
+          "label": "LCSC",
+          "name": "LCSC",
+          "show": true
+        },
+        {
+          "group_by": false,
+          "label": "LCSC_PART_NUMBER",
+          "name": "LCSC_PART_NUMBER",
+          "show": true
+        },
+        {
+          "group_by": false,
+          "label": "MANUFACTURER",
+          "name": "MANUFACTURER",
+          "show": false
+        },
+        {
+          "group_by": false,
+          "label": "MAXIMUM_PACKAGE_HEIGHT",
+          "name": "MAXIMUM_PACKAGE_HEIGHT",
+          "show": false
+        },
+        {
+          "group_by": false,
+          "label": "MF",
+          "name": "MF",
+          "show": false
+        },
+        {
+          "group_by": false,
+          "label": "MP",
+          "name": "MP",
+          "show": false
+        },
+        {
+          "group_by": false,
+          "label": "PARTREV",
+          "name": "PARTREV",
+          "show": false
+        },
+        {
+          "group_by": false,
+          "label": "Package",
+          "name": "Package",
+          "show": false
+        },
+        {
+          "group_by": false,
+          "label": "Price",
+          "name": "Price",
+          "show": false
+        },
+        {
+          "group_by": false,
+          "label": "Purchase-URL",
+          "name": "Purchase-URL",
+          "show": false
+        },
+        {
+          "group_by": false,
+          "label": "STANDARD",
+          "name": "STANDARD",
+          "show": false
+        },
+        {
+          "group_by": false,
+          "label": "Sim.Device",
+          "name": "Sim.Device",
+          "show": false
+        },
+        {
+          "group_by": false,
+          "label": "Sim.Pins",
+          "name": "Sim.Pins",
+          "show": false
+        },
+        {
+          "group_by": false,
+          "label": "Sim.Type",
+          "name": "Sim.Type",
+          "show": false
+        },
+        {
+          "group_by": false,
+          "label": "SnapEDA_Link",
+          "name": "SnapEDA_Link",
+          "show": false
+        },
+        {
+          "group_by": false,
+          "label": "Description",
+          "name": "Description",
+          "show": false
         }
       ],
       "filter_string": "",
       "group_symbols": true,
-      "name": "Grouped By Value",
+      "name": "",
       "sort_asc": true,
       "sort_field": "Reference"
     },

next/.cargo/config.toml

@@ -0,0 +1,17 @@
+[build]
+target = "riscv32imac-esp-espidf"
+
+[target.riscv32imac-esp-espidf]
+linker = "ldproxy"
+# runner = "espflash --monitor" # Select this runner for espflash v1.x.x
+runner = "espflash flash --monitor --baud 921600" # Select this runner for espflash v2.x.x
+rustflags = [ "--cfg",  "espidf_time64"] # Extending time_t for ESP IDF 5: https://github.com/esp-rs/rust/issues/110
+
+[unstable]
+build-std = ["std", "panic_abort"]
+
+[env]
+MCU="esp32c6"
+# Note: this variable is not used by the pio builder (`cargo build --features pio`)
+ESP_IDF_VERSION = "v5.1.3"
+

next/.gitignore

@@ -0,0 +1,4 @@
+/.vscode
+/.embuild
+/target
+/Cargo.lock

next/Cargo.toml

@@ -0,0 +1,36 @@
+[package]
+name = "next"
+version = "0.1.0"
+authors = ["Empire <empirephoenix@yahoo.de>"]
+edition = "2021"
+resolver = "2"
+rust-version = "1.71"
+
+[profile.release]
+opt-level = "s"
+
+[profile.dev]
+debug = true    # Symbols are nice and they don't increase the size on Flash
+opt-level = "z"
+
+[features]
+default = ["std", "embassy", "esp-idf-svc/native"]
+
+pio = ["esp-idf-svc/pio"]
+std = ["alloc", "esp-idf-svc/binstart", "esp-idf-svc/std"]
+alloc = ["esp-idf-svc/alloc"]
+nightly = ["esp-idf-svc/nightly"]
+experimental = ["esp-idf-svc/experimental"]
+embassy = ["esp-idf-svc/embassy-sync", "esp-idf-svc/critical-section", "esp-idf-svc/embassy-time-driver"]
+
+[dependencies]
+log = { version = "0.4", default-features = false }
+esp-idf-svc = { version = "0.48", default-features = false }
+esp-idf-hal = "0.43.0"
+embedded-hal = "1.0.0"
+
+[build-dependencies]
+embuild = "0.31.3"
+
+[patch.crates-io]
+esp-idf-hal = { git = "https://github.com/empirephoenix/esp-idf-hal.git" }

next/build.rs

@@ -0,0 +1,3 @@
+fn main() {
+    embuild::espidf::sysenv::output();
+}

next/rust-toolchain.toml

@@ -0,0 +1,3 @@
+[toolchain]
+channel = "nightly"
+components = ["rust-src"]

next/sdkconfig.defaults

@@ -0,0 +1,14 @@
+# Rust often needs a bit of an extra main task stack size compared to C (the default is 3K)
+CONFIG_ESP_MAIN_TASK_STACK_SIZE=8000
+
+# Use this to set FreeRTOS kernel tick frequency to 1000 Hz (100 Hz by default).
+# This allows to use 1 ms granuality for thread sleeps (10 ms by default).
+CONFIG_FREERTOS_HZ=1000
+
+# Workaround for https://github.com/espressif/esp-idf/issues/7631
+#CONFIG_MBEDTLS_CERTIFICATE_BUNDLE=n
+#CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_FULL=n
+#CONFIG_LOG_MAXIMUM_LEVEL_WARN=y
+CONFIG_LOG_DEFAULT_LEVEL_NONE=y
+CONFIG_ESP_TASK_WDT_TIMEOUT_S=60
+CONFIG_ESP_DEBUG_STUBS_ENABLE=n

next/src/lib.rs

@@ -0,0 +1,4 @@
+#![allow(dead_code)]
+extern crate embedded_hal as hal;
+
+pub mod sipo;

next/src/main.rs

@@ -0,0 +1,98 @@
+use esp_idf_hal::{
+    adc::{
+        attenuation,
+        oneshot::{config::AdcChannelConfig, AdcChannelDriver, AdcDriver},
+    },
+    delay::Delay,
+    gpio::{AnyInputPin, IOPin, InputOutput, PinDriver, Pull},
+    peripherals::Peripherals,
+    sys::{esp_timer_get_time, vTaskDelay},
+};
+
+use next::sipo::ShiftRegister8;
+use esp_idf_hal::pcnt::{
+    PcntChannel, PcntChannelConfig, PcntControlMode, PcntCountMode, PcntDriver, PinIndex,
+};
+
+fn main() {
+    // It is necessary to call this function once. Otherwise some patches to the runtime
+    // implemented by esp-idf-sys might not link properly. See https://github.com/esp-rs/esp-idf-template/issues/71
+    esp_idf_svc::sys::link_patches();
+
+    // Bind the log crate to the ESP Logging facilities
+    esp_idf_svc::log::EspLogger::initialize_default();
+
+    log::info!("Hello, world!");
+
+    let peripherals = Peripherals::take().unwrap();
+
+    let mut s0 = PinDriver::input_output(peripherals.pins.gpio10.downgrade()).unwrap();
+    s0.set_low();
+
+
+    //s0 = 11
+    //s1 = 8
+    //s2 = 22
+    //s3 = 21
+
+    
+    let mut counter_unit1 = PcntDriver::new(
+        peripherals.pcnt0,
+        Some(peripherals.pins.gpio5),
+        Option::<AnyInputPin>::None,
+        Option::<AnyInputPin>::None,
+        Option::<AnyInputPin>::None,
+    ).unwrap();
+
+    println!("Channel config start");
+
+    counter_unit1.channel_config(
+        PcntChannel::Channel0,
+        PinIndex::Pin0,
+        PinIndex::Pin1,
+        &PcntChannelConfig {
+            lctrl_mode: PcntControlMode::Keep,
+            hctrl_mode: PcntControlMode::Keep,
+            pos_mode: PcntCountMode::Increment,
+            neg_mode: PcntCountMode::Hold,
+            counter_h_lim: i16::MAX,
+            counter_l_lim: 0,
+        },
+    ).unwrap();
+
+    println!("Setup filter");
+
+    //TODO validate filter value! currently max allowed value
+    //counter_unit1.set_filter_value(1023).unwrap();
+    //counter_unit1.filter_enable().unwrap();
+    
+    counter_unit1.counter_pause().unwrap();
+    let delay = Delay::new(1);
+    loop {
+        s0.set_low().unwrap();
+        delay.delay_ms(100);
+        let sensor0 = measure(&mut counter_unit1, &delay);    
+
+        s0.set_high().unwrap();
+        delay.delay_ms(100);
+        let sensor1 = measure(&mut counter_unit1, &delay);    
+        
+        println!(
+            "Sensor a {}hz sensor b {}hz",
+            sensor0,
+            sensor1
+        );
+       
+    }
+}
+
+fn measure (counter_unit1: &mut PcntDriver, delay: &Delay) -> u32{
+    counter_unit1.counter_clear().unwrap();
+        counter_unit1.counter_resume().unwrap();
+
+        delay.delay_ms(100);
+        
+        counter_unit1.counter_pause().unwrap();
+        let sensor0 = counter_unit1.get_counter_value().unwrap() as u32 * 10;
+        return sensor0
+}

next/src/sipo.rs

@@ -0,0 +1,153 @@
+//! Serial-in parallel-out shift register
+
+use core::cell::RefCell;
+use core::mem::{self, MaybeUninit};
+use std::convert::Infallible;
+
+use hal::digital::OutputPin;
+
+trait ShiftRegisterInternal {
+    fn update(&self, index: usize, command: bool) -> Result<(), ()>;
+}
+
+/// Output pin of the shift register
+pub struct ShiftRegisterPin<'a> {
+    shift_register: &'a dyn ShiftRegisterInternal,
+    index: usize,
+}
+
+impl<'a> ShiftRegisterPin<'a> {
+    fn new(shift_register: &'a dyn ShiftRegisterInternal, index: usize) -> Self {
+        ShiftRegisterPin {
+            shift_register,
+            index,
+        }
+    }
+}
+
+impl embedded_hal::digital::ErrorType for ShiftRegisterPin<'_> {
+    type Error = Infallible;
+}
+
+impl OutputPin for ShiftRegisterPin<'_> {
+    fn set_low(&mut self) -> Result<(), Infallible> {
+        self.shift_register.update(self.index, false).unwrap();
+        Ok(())
+    }
+
+    fn set_high(&mut self) -> Result<(), Infallible> {
+        self.shift_register.update(self.index, true).unwrap();
+        Ok(())
+    }
+}
+
+macro_rules! ShiftRegisterBuilder {
+    ($name: ident, $size: expr) => {
+        /// Serial-in parallel-out shift register
+        pub struct $name<Pin1, Pin2, Pin3>
+        where
+            Pin1: OutputPin,
+            Pin2: OutputPin,
+            Pin3: OutputPin,
+        {
+            clock: RefCell<Pin1>,
+            latch: RefCell<Pin2>,
+            data: RefCell<Pin3>,
+            output_state: RefCell<[bool; $size]>,
+        }
+
+        impl<Pin1, Pin2, Pin3> ShiftRegisterInternal for $name<Pin1, Pin2, Pin3>
+        where
+            Pin1: OutputPin,
+            Pin2: OutputPin,
+            Pin3: OutputPin,
+        {
+            /// Sets the value of the shift register output at `index` to value `command`
+            fn update(&self, index: usize, command: bool) -> Result<(), ()> {
+                self.output_state.borrow_mut()[index] = command;
+                let output_state = self.output_state.borrow();
+                self.latch.borrow_mut().set_low().map_err(|_e| ())?;
+
+                for i in 1..=output_state.len() {
+                    if output_state[output_state.len() - i] {
+                        self.data.borrow_mut().set_high().map_err(|_e| ())?;
+                    } else {
+                        self.data.borrow_mut().set_low().map_err(|_e| ())?;
+                    }
+                    self.clock.borrow_mut().set_high().map_err(|_e| ())?;
+                    self.clock.borrow_mut().set_low().map_err(|_e| ())?;
+                }
+
+                self.latch.borrow_mut().set_high().map_err(|_e| ())?;
+                Ok(())
+            }
+        }
+
+        impl<Pin1, Pin2, Pin3> $name<Pin1, Pin2, Pin3>
+        where
+            Pin1: OutputPin,
+            Pin2: OutputPin,
+            Pin3: OutputPin,
+        {
+            /// Creates a new SIPO shift register from clock, latch, and data output pins
+            pub fn new(clock: Pin1, latch: Pin2, data: Pin3) -> Self {
+                $name {
+                    clock: RefCell::new(clock),
+                    latch: RefCell::new(latch),
+                    data: RefCell::new(data),
+                    output_state: RefCell::new([false; $size]),
+                }
+            }
+
+            /// Get embedded-hal output pins to control the shift register outputs
+            pub fn decompose(&self) -> [ShiftRegisterPin; $size] {
+                // Create an uninitialized array of `MaybeUninit`. The `assume_init` is
+                // safe because the type we are claiming to have initialized here is a
+                // bunch of `MaybeUninit`s, which do not require initialization.
+                let mut pins: [MaybeUninit<ShiftRegisterPin>; $size] =
+                    unsafe { MaybeUninit::uninit().assume_init() };
+
+                // Dropping a `MaybeUninit` does nothing, so if there is a panic during this loop,
+                // we have a memory leak, but there is no memory safety issue.
+                for (index, elem) in pins.iter_mut().enumerate() {
+                    elem.write(ShiftRegisterPin::new(self, index));
+                }
+
+                // Everything is initialized. Transmute the array to the
+                // initialized type.
+                unsafe { mem::transmute::<_, [ShiftRegisterPin; $size]>(pins) }
+            }
+
+            /// Consume the shift register and return the original clock, latch, and data output pins
+            pub fn release(self) -> (Pin1, Pin2, Pin3) {
+                let Self {
+                    clock,
+                    latch,
+                    data,
+                    output_state: _,
+                } = self;
+                (clock.into_inner(), latch.into_inner(), data.into_inner())
+            }
+        }
+    };
+}
+
+ShiftRegisterBuilder!(ShiftRegister8, 8);
+ShiftRegisterBuilder!(ShiftRegister16, 16);
+ShiftRegisterBuilder!(ShiftRegister24, 24);
+ShiftRegisterBuilder!(ShiftRegister32, 32);
+ShiftRegisterBuilder!(ShiftRegister40, 40);
+ShiftRegisterBuilder!(ShiftRegister48, 48);
+ShiftRegisterBuilder!(ShiftRegister56, 56);
+ShiftRegisterBuilder!(ShiftRegister64, 64);
+ShiftRegisterBuilder!(ShiftRegister72, 72);
+ShiftRegisterBuilder!(ShiftRegister80, 80);
+ShiftRegisterBuilder!(ShiftRegister88, 88);
+ShiftRegisterBuilder!(ShiftRegister96, 96);
+ShiftRegisterBuilder!(ShiftRegister104, 104);
+ShiftRegisterBuilder!(ShiftRegister112, 112);
+ShiftRegisterBuilder!(ShiftRegister120, 120);
+ShiftRegisterBuilder!(ShiftRegister128, 128);
+
+/// 8 output serial-in parallel-out shift register
+pub type ShiftRegister<Pin1, Pin2, Pin3> = ShiftRegister8<Pin1, Pin2, Pin3>;