# ch32v203-bms

A simple battery management controller software.

## CAN bus and hardware address

This firmware exposes a CAN interface on the CH32V203 and uses 4 hardware address pins to allow up to 16 sensors on the same bus.

- CAN pins (default mapping):
  - CAN RX: PA11
  - CAN TX: PA12
- Address select pins (with internal pull-ups):
  - A0: PA0
  - A1: PA1
  - A2: PA2
  - A3: PA3

Wire each address pin to GND to set its corresponding bit to 1. The 4-bit address range is 0..15. The node’s CAN Standard ID is `0x100 | addr`, i.e. 0x100..0x10F. The CAN acceptance filter is configured to only accept frames with the node’s own ID.

Adjust the pins above if your PCB routes CAN or address lines to different pads.

## 555 timer (software) emulation mode

To save the BOM cost of a classic NE555 in simple oscillator applications, this firmware implements a minimal 555-like Schmitt trigger using the MCU’s ADC and a GPIO, approximating the behavior when the capacitor is charged/discharged via Q through a resistor, and the combined Trigger/Threshold senses the capacitor node.

- Pins used:
  - Q output: PB2
  - Combined Trigger/Threshold (ADC input): PA0
- Wiring:
  - PB2 (Q) -> series resistor R -> capacitor node
  - Capacitor node -> capacitor to GND
  - Capacitor node -> PA0 (ADC input)
- Behavior:
  - When ADC(PA0) <= ~1/3 Vref, PB2 is driven High.
  - When ADC(PA0) >= ~2/3 Vref, PB2 is driven Low.
  - Hysteresis avoids chatter; the actual charge/discharge dynamics follow your chosen R and C.
- Notes:
  - Use an appropriate resistor from PB2 to the capacitor to set oscillation frequency. Start with 10k..100k and adjust with C.
  - Ensure PA0 is routed to the capacitor node and left high impedance (no strong pull-ups/downs) so the ADC can sense the analog voltage.
  - PB2 drives the on-board LED (if present), so the LED might blink at the oscillation frequency.

This mode is implemented in `src/main.rs` using `hal::adc::Adc::convert(&mut pin, SampleTime::...)` to take periodic samples and a simple state machine to toggle the Q output based on ~1/3 and ~2/3 Vref thresholds.

## Building

``` sh
cargo build --release
```

## Flash

``` sh
wchisp config reset
wchip wchisp flash target/riscv32imc-unknown-none-elf/release/bms
```

## Debugging

For debugging purposes a container file is provided together with wrapper scripts to start the containerized `openocd` and `riscv-gdb` transparently. The wrapper scripts assume that `podman` is setup.

Starting Debug server 

```
./bin/openocd
```

Connecting with gdb for interactive debugging

```
./bin/gdb -f target/riscv32imc-unknown-none-elf/release/bms
```